--- /dev/null
+From 1addfb042a9d27788a0fb2c2935045b56fd8560e Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Thu, 23 Jan 2025 03:25:29 +0000
+Subject: [PATCH] net: phy: realtek: mark existing MMDs as present
+
+When using Clause-45 mode to access RealTek RTL8221B 2.5G PHYs some
+versions of the PHY fail to report the MMDs present on the PHY.
+Mark MMDs PMAPMD, PCS and AN which are always existing according to
+the datasheet as present to fix that.
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/net/phy/realtek/realtek_main.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1595,6 +1595,9 @@ static int rtl822x_c45_get_features(stru
+ linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
+ phydev->supported);
+
++ phydev->c45_ids.mmds_present |= MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS |
++ MDIO_DEVS_AN;
++
+ return genphy_c45_pma_read_abilities(phydev);
+ }
+
--- /dev/null
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Thu, 30 Jan 2025 05:38:31 +0000
+Subject: [PATCH] net: phy: realtek: disable MDIO broadcast
+
+RealTek's PHYs by default also listen on MDIO address 0 which is defined
+as broadcast address. This can lead to problems if there is an actual PHY
+(such as MT7981 built-in PHY) present at this address, as accessing that
+PHY may then confuse the RealTek PHY.
+
+Disabled listening on the MDIO broadcast address to avoid such problems.
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -173,6 +173,7 @@
+ #define RTL8221B_PHYCR1 0xa430
+ #define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
+ #define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN BIT(12)
++#define RTL8221B_PHYCR1_PHYAD_0_EN BIT(13)
+
+ #define RTL8366RB_POWER_SAVE 0x15
+ #define RTL8366RB_POWER_SAVE_ON BIT(12)
+@@ -1350,7 +1351,8 @@ static int rtl822x_init_phycr1(struct ph
+
+ return phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, RTL8221B_PHYCR1,
+ RTL8221B_PHYCR1_ALDPS_EN |
+- RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN, val);
++ RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN |
++ RTL8221B_PHYCR1_PHYAD_0_EN, val);
+ }
+
+ static int rtl822x_set_serdes_option_mode(struct phy_device *phydev, bool gen1)
+++ /dev/null
-From 1addfb042a9d27788a0fb2c2935045b56fd8560e Mon Sep 17 00:00:00 2001
-From: Daniel Golle <daniel@makrotopia.org>
-Date: Thu, 23 Jan 2025 03:25:29 +0000
-Subject: [PATCH] net: phy: realtek: mark existing MMDs as present
-
-When using Clause-45 mode to access RealTek RTL8221B 2.5G PHYs some
-versions of the PHY fail to report the MMDs present on the PHY.
-Mark MMDs PMAPMD, PCS and AN which are always existing according to
-the datasheet as present to fix that.
-
-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
----
- drivers/net/phy/realtek/realtek_main.c | 3 +++
- 1 file changed, 3 insertions(+)
-
---- a/drivers/net/phy/realtek/realtek_main.c
-+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1626,6 +1626,9 @@ static int rtl822x_c45_get_features(stru
- linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
- phydev->supported);
-
-+ phydev->c45_ids.mmds_present |= MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS |
-+ MDIO_DEVS_AN;
-+
- return genphy_c45_pma_read_abilities(phydev);
- }
-
--- /dev/null
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Mon, 5 Jan 2026 17:55:02 +0000
+Subject: [PATCH] net: phy: realtek: rate-adapter in C22 mode
+
+Use rate-adapter mode in case the PHY is connected to the host using
+Clause-22 MDIO.
+
+This is necessary because phylink only handles dynamically switching the
+interface mode if the PHY is connected using Clause-45 MDIO.
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1379,7 +1379,7 @@ static int rtl822x_set_serdes_option_mod
+ return 0;
+
+ /* determine SerDes option mode */
+- if (has_2500 && !has_sgmii) {
++ if (has_2500 && (!has_sgmii || !phydev->is_c45)) {
+ mode = RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX;
+ phydev->rate_matching = RATE_MATCH_PAUSE;
+ } else {
+++ /dev/null
-From: Daniel Golle <daniel@makrotopia.org>
-Date: Thu, 30 Jan 2025 05:38:31 +0000
-Subject: [PATCH] net: phy: realtek: disable MDIO broadcast
-
-RealTek's PHYs by default also listen on MDIO address 0 which is defined
-as broadcast address. This can lead to problems if there is an actual PHY
-(such as MT7981 built-in PHY) present at this address, as accessing that
-PHY may then confuse the RealTek PHY.
-
-Disabled listening on the MDIO broadcast address to avoid such problems.
-
-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
----
---- a/drivers/net/phy/realtek/realtek_main.c
-+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -174,6 +174,7 @@
- #define RTL8221B_PHYCR1 0xa430
- #define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
- #define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN BIT(12)
-+#define RTL8221B_PHYCR1_PHYAD_0_EN BIT(13)
-
- #define RTL8366RB_POWER_SAVE 0x15
- #define RTL8366RB_POWER_SAVE_ON BIT(12)
-@@ -1381,7 +1382,8 @@ static int rtl822x_init_phycr1(struct ph
-
- return phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, RTL8221B_PHYCR1,
- RTL8221B_PHYCR1_ALDPS_EN |
-- RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN, val);
-+ RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN |
-+ RTL8221B_PHYCR1_PHYAD_0_EN, val);
- }
-
- static int rtl822x_set_serdes_option_mode(struct phy_device *phydev, bool gen1)
--- /dev/null
+From 98a5d7606b7bc9136205969418385e4c9bf8ce56 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Mon, 5 Jan 2026 16:59:06 +0000
+Subject: [PATCH] net: phy: realtek: support interrupt also for C22 variants
+
+Now that access to MDIO_MMD_VEND2 works transparently also in Clause-22
+mode, add interrupt support also for the C22 variants of the
+RTL8221B-VB-CG and RTL8221B-VM-CG.
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/net/phy/realtek/realtek_main.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -2347,6 +2347,8 @@ static struct phy_driver realtek_drvs[]
+ }, {
+ .match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
+ .name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
++ .config_intr = rtl8221b_config_intr,
++ .handle_interrupt = rtl8221b_handle_interrupt,
+ .soft_reset = genphy_soft_reset,
+ .probe = rtl822x_probe,
+ .get_features = rtl822x_get_features,
+@@ -2381,6 +2383,8 @@ static struct phy_driver realtek_drvs[]
+ }, {
+ .match_phy_device = rtl8221b_vm_cg_c22_match_phy_device,
+ .name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
++ .config_intr = rtl8221b_config_intr,
++ .handle_interrupt = rtl8221b_handle_interrupt,
+ .soft_reset = genphy_soft_reset,
+ .probe = rtl822x_probe,
+ .get_features = rtl822x_get_features,
projects / openwrt / openwrt.git / commitdiff